Pentek's New Quartz RFSoC development platform speeds application design
Pentek, Inc., introduced the Model 8257 3U VPX development chassis for Pentek's new Quartz RFSoC FPGA product line. Developed specifically for Pentek's Model 5950 Zynq UltraScale+ RFSoC 3U VPX Processor, the Model 8257 chassis features a single-slot backplane, power supply, forced-air cooling, and connectors to support all functions of the 5950.
The Model 8257 is configured to accept the user's Model 5950 Quartz 3U VPX board, which houses the Model 6001 QuartzXM (QuartzXM eXpress Module) containing the Xilinx Zynq UltraScale+ RFSoC FPGA. The 8257 includes the Model 5901 rear transition module (RTM) for backplane I/O connections, along with all needed cables. Optional MPO (Multiple-Fiber Push-On/Pull-off) optical bulkhead connectors support the 5950's dual 100 GigE interfaces using VITA 66.4.
This platform allows the user to start application and proof of concept designs immediately on a known, tested platform. Developers can connect a notebook or desktop PC with Xilinx's Vivado Design Suite and Pentek's Navigator Design Suite to start development. Providing power and cooling in a small desktop footprint, the chassis allows access to all required interfaces on the front panel and rear transition module. The Model 8257 is 7.59" W x 12.12" D x 16.75" H, weighing in at 17.8 lbs. with its 250-Watt power supply.
"The alternative to the Model 8257 is having the user purchase and integrate his own chassis, which would be more expensive and time consuming," said Bob Sgandurra, Pentek's Director of Product Management. "This development platform provides an immediate, out-of-the-box, and cost-effective solution, optimized for rapid RFSoC development."
At the heart of the Model 5950 is Xilinx's Zynq UltraScale+ RFSoC FPGA. The FPGA is equipped with multi-core ARM processors, often eliminating the need for an additional SBC. The FPGA supports communication interfaces typically found on general purpose processors including USB, RS-232, GbE, and DisplayPort. The 5950's rear transition module provides access to these interfaces as well as JTAG and general purpose FPGA I/O. The Model 8257 can be equipped with optional dual MPO optical bulkhead connectors, fully compliant with ANSI/VITA 66.4, to support the Model 5950's dual 100 GigE interfaces. The chassis uses these dual optical interfaces to handle high-speed data streaming for built-in factory example functions including data acquisition and waveform generation.
Pentek's Navigator Design Suite includes Navigator FDK (FPGA Design Kit) for custom IP development and Navigator BSP (Board Support Package) for creating host software applications. The Navigator FDK includes the board's entire FPGA design as a block diagram along with all source code, Pentek's AXI-4 IP Library, and complete documentation. It is easily edited using the graphical tools in IP Integrator, which is part of Xilinx's Vivado tool suite.
Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK Library is AXI-4 compliant, providing a well-defined interface for developing custom IP or integrating IP from other sources.
For more information contact Pentek online at www.pentek.com.