Pentek’s new 3U VPX board optimizes high-speed optical and RF I/O connectivity

UPPER SADDLE RIVER, NJ ─Pentek, Inc., in Upper Saddle River, N.J. recently introduced the newest member of its Jade family of high-performance 3U VPX boards. The Model 54851 is based on the Xilinx Kintex Ultrascale FPGA and features two 500 MHz 12-bit A/Ds with two programmable multiband digital downconverters (DDCs) and one digital upconverter (DUC) with two 800 MHz 16-bit D/As.

Pentek’s new 3U VPX board optimizes high-speed optical and RF I/O connectivity
Pentek’s new 3U VPX board optimizes high-speed optical and RF I/O connectivity
UPPER SADDLE RIVER, NJ ─ Pentek, Inc., in Upper Saddle River, N.J. recently introduced the newest member of its Jade family of high-performance 3U VPX boards. The Model 54851 is based on the Xilinx Kintex Ultrascale FPGA and features two 500 MHz 12-bit A/Ds with two programmable multiband digital downconverters (DDCs) and one digital upconverter (DUC) with two 800 MHz 16-bit D/As.

The Model 54851 takes advantage of these VPX I/O options for RF and optical interconnects through the VPX backplane:

  • Option -110: Optical connections based on VITA 66.5 (draft), containing blind-mate MT optical connectors with fixed contacts on the plug-in module and floating displacement on the backplane.
  • Option -111: RF connections based on ANSI/VITA 67.2, containing multi-position blind-mate analog connectors with SMPM contacts.
  • Option -112: RF connections based on ANSI/VITA 67.3 type C, containing multi-position blind mate analog connectors with SMPM contacts, spring-loaded on the backplane allowing more movement and larger diameter cables for better performance.

Future options for higher density optical and RF connectors are planned as the supporting standards become available. Organizations such as The Open Group Sensor Open Systems Architecture (SOSA) Consortium are specifying additional types and apertures for VITA 67.3.

The Model 54851 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the entry-level KU035 (with 1,700 DSP slices) to the high-performance KU115 (with 5,520 DSP slices). The KU115 is suitable for demanding modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.

For more information, please contact Pentek on its website.

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