Reprogrammable prototyping solutions for radiation-tolerant (rad-tolerant), one-time programmable field-programmable gate arrays (FPGAs) used in an application-specific integrated circuit (ASIC)-verification-like design flow can help keep costs down when developing digital circuitry for space applications.
Harsh environment for electronics
Space is an extremely harsh environment for electronic components, particularly in light of high levels of ionizing radiation and radiation-induced single event effects (SEEs). For digital and mixed-signal electronics, the effects of cosmic radiation fall broadly into two categories: permanent and temporary.
Permanent effects include single event latch-ups (SELs), configuration upsets causing permanent loss to a device’s functionality such as those seen in static random access memory (SRAM) FPGAs, and damages when devices’ total ionizing dose (TID) ratings are exceeded. Temporary effects include single event upsets (SEUs), single event transients (SETs), and single event functional interrupts (SEFIs). Though temporary, they are still a cause for concern, as an SEU could have an immediate effect on the output state of a device relied on for control or it could change the logic state of a memory cell later relied upon for a mission-critical function.
Mitigating against the effects of cosmic radiation presents a considerable challenge for not only systems designers – who typically build error-checking, redundancy, and voting algorithms into their digital designs – but also device manufacturers making radiation-hardened (RH) and radiation-tolerant (RT) components. For instance, RH ASICs with good SEE and TID radiation performance have been used in space applications for several decades, but can be an expensive option that offers little flexibility and a high risk of schedule and cost over-runs if code changes are required. FPGAs, which have evolved from providing simple glue-logic functions to supporting a system-on-chip, represent a lower-risk option while maintaining reasonable performance, power, and radiation characteristics in comparison to RH ASICs.
Microsemi has been developing space solutions with long flight heritage for six decades, and has played an important role in numerous space programs. Microsemi offers a range of high-speed and low-power RT FPGAs that are resistant to radiation-induced permanent effects.
Several of Microsemi’s RT FPGA products are aboard Juno, a NASA orbiter spacecraft that, after a five-year journey, recently reached Jupiter and began its mission to study the planet’s atmosphere and lights around its north and south poles. Specifically, RT FPGAs from Microsemi’s RTSX-SU and RTAX product families are in use within Juno’s command and control systems as well as a variety of scientific instruments.
Microsemi’s RT FPGAs were also used on the recently-completed Rosetta mission which, after a ten-year journey, landed a probe onto the surface of a comet almost 500 million miles from Earth. Most recently, RTAX FPGAs were on the first 10 Iridium NEXT communications satellites that are set to greatly enhance Iridium’s ability to meet growing demands for global mobile communication on land, at sea, and in the sky. Microsemi has shipped tens of thousands of RTAX flight units for space missions, a figure that excludes prototyping units.
Using rad-tolerant FPGAs
On a general note, the extent to which RT FPGAs are used for various functions is best illustrated in figure 1, which shows a typical remote sensing payload application. Microsemi’s RT FPGAs and other space solutions that can participate in such payloads are highlighted in blue. RTSX-SU FPGAs have been used in the sensor power supply and payload interface units, while RTAX FPGAs have participated in the transmit and storage functions. The latest high-speed RTG4 FPGAs are expected to do the heavy-duty signal processing and data compression in this type of payload.
Figure 1: A Typical Remote Sensing Payload
Confidence: At what cost?
Clearly, before committing any circuitry to duties in space it must be fully verified. Accordingly, prototyping is an important step in design verification as it assists in identifying problems either missed during simulation or not identifiable through simulation. A typical RTAX design flow is shown in figure 2.
Figure 2: Typical RTAX Design Flow
Each time it is executed, the flow results in a programmed RTAX device that could be inserted into a socket on the target board. However, for development and prototyping purposes, the use of an RT device with full screening for flight is costly and unnecessary. An alternative is to program an AX device, the commercial equivalent of RTAX. AX devices are cheaper than their RT counterparts but, depending on the package type (ceramic or plastic), far from a disposable commodity. However, whether targeting an RTAX or an AX device, there are two problems with this strategy.
Firstly, it is most likely the case that it is not just the design within the FPGA that is being verified here. The rest of the system, which will probably include other FPGAs, is also being verified, and is certainly not exempt from changes that will impact our FPGA’s configuration. Dozens of AX or RTAX devices could be burnt seeking the level of confidence required for sign-off. Secondly, the sockets required for the exercise are expensive and can introduce poor mechanical connections. The verification of those mechanical connections is therefore an additional step.
A less-expensive method is to use a prototyping solution that is reprogrammable, allowing a device to be targeted (that is, the place and route can be done) as often as is necessary to increase confidence before committing to burning a one-time programmable (OTP) device.
In 2006, Microsemi partnered with Aldec, the electronic design automation (EDA) industry’s largest independent design verification company for FPGAs, to produce a prototyping adaptor board. It uses Microsemi’s ProASIC3E reprogrammable flash FPGAs that support devices up to 3 million system gates.
The adapter is footprint-compatible with RTAX devices and can be soldered on to the target PCB; in other words, there is no need to design a PCB just for prototyping. Moreover, the ProASIC3E FPGA prototyping solutions are available for Microsemi’s RTAX1000S/SL, RTAX2000S/SL, and RTAX4000S/SL devices. On-the-fly reprogramming of the ProASIC 3E device is facilitated through boundary-scan (JTAG).
A GUI-based application that remaps post-synthesis RTAX netlist to ProASIC3E netlist in readiness for place and route saves considerable time. Accordingly, an RTAX prototyping flow would be as shown in figure 3.
Figure 3: RTAX Prototyping Flow
Prototyping in this way is recommended for early phases of a design cycle when multiple design iterations would take place and can benefit from reprogrammable prototyping devices. As a result, solutions such as those offered by Aldec can greatly shorten the overall verification cycle because a great deal of pressure is taken off simulation. Now, it is possible to seek a practical level of reassurance from simulation and then fast-track to verifying the design post place and route, but without risking dozens of spaceflight RTAX or even AX devices purely for prototyping purposes.
Since the launch of the prototyping adaptor in 2006, Aldec has sold thousands of RTAX prototyping units. Some missions would use up to 20 prototyping adaptors at the same time for system-wide verification, something that would unlikely to be done at the expense of burning potentially hundreds of OTP devices. These prototyping solutions are widely adopted in the USA, Europe, and Asia.
In summary, the prototyping adaptor jointly developed by Aldec and Microsemi can save time and money: a must for any EDA solution. Also, because of the considerable reassurances sought for space applications — such as reliability and ruggedness — confidence in any and all devices must be high. Here, that confidence is derived through the use of a prototyping device and a target device made by the same OEM, in this case, Microsemi with its space pedigree and Aldec’s proficiency for FPGA verification.
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